Prior counters have often required gated parallel access to each memory element of a counter circuit to program the initial state of the counter and to read the state therefrom. If transfer of the count state to a controlling source for processing or display was required in the serial mode, a serial to parallel shift register in conjunction with the counter was sometimes required.
The present invention, by eliminating the need for parallel access to each memory element of the counter, has particular advantage where a series of concatenated counters or a single counter of any significant length is provided within a single integrated circuit package. Prior art techniques required a package pin for accessing each memory element. This usually required such a large package that it was neither practical nor economical. Therefore, several smaller packages were used instead.
The technique of the present invention allows packaging a counter circuit within a package having only the necessary power inputs, a shift input, a count input, a shift clock input, a shift output and a mode control input. Presetting and reading of the counter are accomplished in the serial mode by shifting any appropriate starting value therein.